A modern application specific integrated circuit (ASIC) must meet very stringent design and performance specifications. One of the factors that influence the design and performance of an ASIC is inductance. Typically, it is desirable to minimize the inductance in the power supply network as well as in the signal distribution network. Minimizing inductance improves signal isolation and reduces cross talk between signal paths. A modern ASIC is typically assembled into a package, which is then mounted to a structure, such as a printed circuit board, using one of a number of known mounting techniques. The ASIC package frequently includes a laminate structure that includes a laminate core and one or more material layers on opposing sides of the core that include conductive traces and that are used to distribute power, to route signals and to provide ground connections for both power and signal connections. The laminate structure is typically located between the ASIC chip and the PCB to distribute power and signals between the ASIC and the PCB. Due to the many power and signal connections in a modern ASIC, inductance between power supply and ground connections, and inductance between signal and ground connections and between signal lines can easily become so large that it negatively affects the performance of the ASIC.
Therefore, it would be desirable to have a way of minimizing power supply inductance and signal inductance in an ASIC.